| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that the degradation of an S/N ratio, the generation of beat noise or the missing of teletext data to be multiplexed in a blanking period, in a signal processor which A/D converts a video signal, performs YC separation or time axis correction in synchronism with a horizontal synchronizing signal, and so on. SOLUTION: An output signal of an A/D conversion circuit 2 sampled in a free run clock (27 MHz) is interpolated into sampling data of 4 fsc by a first interpolation filter 3 on the basis of interpolation position information of 27 MHs and a burst-locked clock 4 fsc calculated by a first interpolation phase calculating circuit 6. The resulted signal is processed with the 4 fsc in a Y/C separation circuit 4, and then is restored into the original state of 27 MHz by a second interpolation filter 13 on the basis of interpolation phase information of the 4 fsc and 27 MHz calculated in a second interpolation phase calculating circuit 14. In this way, D/A conversion can be applied to the signal without passing the signal through a frame synchronizer 11, and the signal can be output as an analog signal (luminance signal and color signal). COPYRIGHT: (C)2004,JPO
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