发明名称 DEVICE AND METHOD FOR DESIGNING CONNECTION TERMINAL FOR SEMICONDUCTOR DEVICE, AND PROGRAM FOR DESIGNING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a device for designing a connection terminal for a semiconductor device or the like that can efficiently and accurately allocate connection terminals according to a design rule. SOLUTION: This device is provided with a power cell arrangement part wherein a power cell is arranged in one part of a plurality of I/O slots provided within a semiconductor chip, an I/O signal cell arrangement part wherein an I/O signal cell is arranged in the other part thereof, a first connection net that generates a first connection net to connect I/O slots with a plurality of bumps formed on the semiconductor chip, a second connection net that generates a second connection net to connect the bumps with a plurality of external electrodes formed on a package substrate, and a verification part to verify whether or not the power cell, the I/O signal cell, and the first and second connection nets violate a specified design rule. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004047829(A) 申请公布日期 2004.02.12
申请号 JP20020204776 申请日期 2002.07.12
申请人 TOSHIBA CORP 发明人 IMADA TOMOHIKO;SHIBATA TOYOKAZU;WATANABE SEIJI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L23/12;H01L27/04;(IPC1-7):H01L21/82 主分类号 G06F17/50
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