发明名称 LAMINATED DIELECTRIC ISOLATION WAFER AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a laminated dielectric isolation wafer for which an active layer wafer and a supporting substrate wafer can be directly laminated and the number of manufacturing processes and a manufacturing time can be reduced, and to provide its manufacturing method. SOLUTION: A high-temperature polysilicon layer 16 is ground and polished into a residual thickness polysilicon in which the columnar crystal has the same crystal orientation in almost all the regions of the surface side to be laminated. Hence, when the layer 16 is polished, the degree of corrosion due to polishing liquid at grain boundaries in the region of the layer 16 for forming dielectric isolation grooves 13 is almost the same as the degree in the other region of the surface side to be laminated. Thus, since crystal orientations of the polysilicon crystal grains are made uniform in almost all the regions of the surface side to be laminated, a void due to recesses at the grain boundaries does not generate, thereby enabling to directly laminate the active layer wafer 10 on the supporting substrate wafer 20 as well as reducing the number of processes and the manufacturing time. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004047741(A) 申请公布日期 2004.02.12
申请号 JP20020203266 申请日期 2002.07.11
申请人 SUMITOMO MITSUBISHI SILICON CORP 发明人 OI HIROYUKI;KATAKURA TAKASHI
分类号 H01L21/762;H01L21/02;H01L21/76;H01L27/12;(IPC1-7):H01L21/762 主分类号 H01L21/762
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