Vertical field effect power transistor used as a trench gate DMOS transistor has source regions formed vertically to the surface of the silicon wafer by the polysilicon filling height of the trench

摘要

Vertical field effect power transistor has source regions (6) formed vertically to the surface of the silicon wafer by the polysilicon filling height of the trench (4). The trench chamber is filled with insulating oxide so that it forms a surface with the surface of the wafer. An Independent claim is also included for a process for the production of a vertical field effect power transistor.