SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED TEST MODE

摘要

PURPOSE: A semiconductor memory device having an improved test mode is provided to improve burn-in test effect. CONSTITUTION: An array(110) has memory cells arranged in a matrix form of columns and rows. A data write/read circuit writes data on the above array or read data from the above array. An internal voltage generation circuit(120,140) generates the first internal power supply voltage and the second internal power supply voltage by controlling an external power supply voltage. The first power supply line transfers the first internal power supply voltage to the above array. The second power supply line transfers the second internal power supply voltage to the above data write/read circuit. And a control circuit(180) controls the internal voltage generation circuit so that the first and the second internal power supply voltages are varied to different levels according to an operation mode.