发明名称 Circuit arrangement for controlling power transistors
摘要 The first controlled current supply (20) is fed with an unregulated voltage (Vcc). It controls the power transistor (50) gate, causing it to conduct. The second controlled current supply (30) is fed by a second unregulated voltage (Vgeoff), controlling the gate of the power transistor to prevent conduction. The output voltage regulator (40) limits the maximum voltage at the gate of the power transistor, to a suitable value for this component.
申请公布号 EP1388940(A2) 申请公布日期 2004.02.11
申请号 EP20030011569 申请日期 2003.05.22
申请人 SEMIKRON ELEKTRONIK GMBH & CO. KG 发明人 DO NASCIMENTO, JAIR
分类号 H03F3/21;H03K17/0412;H03K17/04;H03K17/0812;(IPC1-7):H03K17/041 主分类号 H03F3/21
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