CLOCKED-SCAN FLIP-FLOP FOR USE IN MULTI-THRESHOLD VOLTAGE CMOS

摘要

PURPOSE: A clocked-scan flip-flop for use in a multi-threshold voltage CMOS is provided to satisfy scan function for testing as well as low power, a high performance as a CP flip-flop. CONSTITUTION: A clocked-scan flip-flop for use in a multi-threshold voltage CMOS includes a first switching circuit, a second switching circuit, a latch unit(230) and a clock input unit(260). The first switching circuit switches the normal data inputted from the outside and outputs the switched normal data. The second switching circuit switches the scan data inputted from the outside and outputs the switched scan data. The latch unit(230) latches the data inputted from the first and the second switching circuit. And, the clock input unit(260) controls the switching operation of the first and the second switching circuit by the operation of the clock signal and the scan clock signal inputted from the outside.