Nonvolatile semiconductor memory cell with electron-trapping erase state and methods for operating the same

摘要

A preferred embodiment of the invention provides a trapping nonvolatile memory cell comprising a P type semiconductor substrate with a N+ source and a N+ drain being formed on the semiconductor substrate, a channel being formed between the source and the drain. A first isolating layer, a nonconducting charge trapping layer, a second isolating layer and a gate are sequentially formed above the channel. The trapping layer stores an amount of electrons as the nonvolatile memory cell is erased.