发明名称 Methods and apparatuses for checking equivalence of circuits
摘要 Methods and systems for designing integrated circuits. In one exemplary method, a first plurality of points in a first representation of a circuit are identified, and the first representation is modified to produce a second representation for which a second plurality of points are identified. The first representation is compared to the second representation at the first plurality and second plurality of points to determine whether the first representation is equivalent to the second representation. Other features and embodiments are also described.
申请公布号 US6691286(B1) 申请公布日期 2004.02.10
申请号 US20010020546 申请日期 2001.10.29
申请人 SYNPLICITY, INC. 发明人 MCELVAIN KENNETH S.;RICKEL DAVID S.
分类号 G06F17/50;(IPC1-7):G06F17/50;G01G23/01 主分类号 G06F17/50
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