发明名称 Gain stage that minimizes the miller effect
摘要 A gain stage is disclosed. The gain stage comprises a first stage that provides two voltages of equal and opposites polarities and a plurality of devices cross coupled to the first stage. The plurality of devices minimize the Miller Effect capacitance in the differential stage by providing an out-of-phase signal to the first stage. Accordingly, a system and method in accordance with the present invention utilizes an at least one extra device on the same die as the first stage to provide an impedance match. In so doing, a broadband cancellation of the Miller Effect is achieved. Moreover, the matching is valid over an extended temperature range.
申请公布号 US6690231(B1) 申请公布日期 2004.02.10
申请号 US20020127909 申请日期 2002.04.22
申请人 RALINK TECHNOLOGY, INC. 发明人 LEE SHENG-HANN
分类号 H03F3/45;G06G7/12;H03F1/02;H03F1/14;H03F3/04;H03G3/00;(IPC1-7):G06G7/12 主分类号 H03F3/45
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