发明名称 Method for production process for the local interconnection level using a dielectric conducting pair on pair
摘要 The invention relates to a process for protection of the grid of a transistor in an integrated circuit for production of a local interconnection pad straddling over the grid and the silicon substrate on which it is formed. The process consists of applying a double dielectric-conducting layer on the transistor grid into which a polysilicon layer is added in order to use the selectivity principle, which is large considering the etching of polysilicon with respect to the oxide in which the local interconnection pad is formed. Furthermore, with the process according to the invention, a silicidation treatment can be applied beforehand on the active areas of the transistor and the grid.
申请公布号 US6689655(B2) 申请公布日期 2004.02.10
申请号 US20020081296 申请日期 2002.02.20
申请人 STMICROELECTRONICS S.A. 发明人 CORONEL PHILIPPE;LEVERD FRANCOIS;FERREIRA PAUL
分类号 H01L21/60;H01L21/768;(IPC1-7):H01L21/823 主分类号 H01L21/60
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