发明名称 STRUCTURE OF HIGH-SPEED MEMORY MODULE
摘要 PURPOSE: A structure of a high-speed memory module is provided to reduce the loss of data due to the time delay by mounting clock buffer drivers into memory modules to generate recovery clocks. CONSTITUTION: A structure of a high-speed memory module includes a plurality of memory modules(12,14,16,18) connected to a chip set(10) of a CPU(Central Processing Unit). A plurality of clock buffer drivers are mounted into the memory modules. A recovery clock is generated from the memory module of the memory modules which is farthest from the chip set(10). The recovery clock is applied to the chip set. The clock buffer drivers of the residual memory modules are in disabled states when the memory module which is farthest from the memory module generates the recovery clock.
申请公布号 KR100419750(B1) 申请公布日期 2004.02.10
申请号 KR19970026182 申请日期 1997.06.20
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, JU SEON;YANG, SEON SEOK
分类号 G11C8/06;(IPC1-7):H03K5/13 主分类号 G11C8/06
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