发明名称 Method to debug ikos models
摘要 A method of debugging an IKOS model. The method includes mapping information contained in either a .pin or .lde file or both into corresponding files which are more user-friendly, readable and editable. Preferably, a .v file which is readable to create a schematic view of the cell is also created and the schematic view can be viewed and analyzed. Then, the one or more user-friendly files which have been created can be read and edited, and the .pin and/or the .lde file is re-created. Then, a tool is used to analyze the .pin and .lde files again and determine whether there is a functional or timing failure.
申请公布号 US6691288(B1) 申请公布日期 2004.02.10
申请号 US20010034535 申请日期 2001.12.27
申请人 LSI LOGIC CORPORATION 发明人 FAKHRY NADER;LAKSHMANAN VISWANATHAN;GAGVANI JAYENDRA P.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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