| 摘要 |
An EPROM structure for a nonvolatile semiconductor memory includes a plurality of memory cells that each include a floating gate transistor (6) that can be programmed by hot electrons and erased by UV light. An additional, common gate capacitance (7) is associated with each memory cell to raise the potential at the floating gate transistor (6) to the level required for writing by applying to the gate capacitances a predetermined voltage, common to all the memory cells.
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