发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To improve MISFET characteristics by controlling concentration profiles in each of impurity regions in an MISFET. SOLUTION: A gate oxide film 8 is formed by thermal oxidation on a semiconductor substrate 1, and then gate electrodes G are formed by dry-etching a polycrystalline silicon film 9 on the gate oxide film 8. Next, boron (B, p-type impurity) is implanted into p-type wells 3 in the substrate 1 from above the substrate 1 for formations of channel impurity regions CH and pocket regions PK. The channel impurity regions CH and the pocket regions PK are formed immediately under and on both sides of the electrodes G, respectively, by making use of steps formed around the gate electrodes G, and concentration profiles in these regions are appropriately controlled. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004039849(A) 申请公布日期 2004.02.05
申请号 JP20020194571 申请日期 2002.07.03
申请人 RENESAS TECHNOLOGY CORP 发明人 GOTO TOSHIHIRO
分类号 H01L27/092;H01L21/265;H01L21/336;H01L21/8238;H01L29/78;(IPC1-7):H01L29/78;H01L21/823 主分类号 H01L27/092
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