| 摘要 |
PURPOSE: A semiconductor memory device is provided to minimize power consumption in a self refresh mode, by controlling a bit line equalization signal(BLEQ) using a power supply voltage(VDD) in the self refresh mode. CONSTITUTION: A bit line equalization circuit(13) equalizes a voltage of a bit line. A bit line equalization signal driving circuit(11) controls a bit line equalization signal controlling the bit line equalization circuit using the first voltage in a normal operation mode, and controls the bit line equalization signal using the second voltage lower than the first voltage in a self refresh mode. The bit line equalization signal driving circuit includes the first voltage control part applying the first voltage to the bit line equalization signal using a self refresh mode signal and a precharge signal, and the second voltage control part applying the second voltage to the bit line equalization signal using the self refresh mode signal and the precharge signal in the self refresh mode.
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