| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To simplify a logical circuit in a high-level data link control (HDLC) circuit and to reduce consumption power, by preventing occurrence of an HDLC short packet or discarding the short packet. <P>SOLUTION: The HDLC transmitting circuit adds an FCS data portion to transmission packet data entered, adds a flag data portion of an octet unit to the transmission packet data of the octet unit, to which the FCS data portion is added, and "0" insertion is performed to the transmission packet data, to which the flag data portion is added. The HDLC receiving circuit deletes the flag data portion from received packet data entered and discards a short packet that the packet length of the received packet data, whose flag data portion is deleted, is smaller than a predetermined number of bytes. Bits to which "0" insertion was performed are deleted from the receiving packet data that is not deleted, and the FCS data portion is deleted from the receiving packet data from which the bits, to which "0" insertion was performed, are deleted. <P>COPYRIGHT: (C)2004,JPO</p> |
