发明名称 Limiter for refresh signal period in dram
摘要 The invention relates to a device (10) for outputting a refresh signal for a memory cell of a semiconductor memory device, the device (10) comprising: a receiving device for receiving a variable periodic refresh input signal (14); a comparison device (22) for comparing the period duration of the refresh input signal (14) with at least one predeterminable value; an output device (22) for outputting a refresh output signal (24) in a manner dependent on the result of the comparison in the comparison device (22); the output device (22) being designed in such a way that if the period duration of the refresh input signal (14) lies above a predeterminable maximum value, a refresh output signal (24) with the predeterminable maximum period duration (T_max) can be output and/or if the period duration of the refresh input signal (14) lies below a predeterminable minimum value, a refresh output signal (24) with a predeterminable minimum period duration (T_min) can be output, and otherwise a refresh output signal (24) can be output whose period duration (T_out) is proportional to the period duration (T_in) of the refresh input signal (14). Furthermore, the invention relates to a method for outputting a refresh signal for a memory cell of a semiconductor memory device.
申请公布号 US2004022103(A1) 申请公布日期 2004.02.05
申请号 US20030386150 申请日期 2003.03.11
申请人 SCHNABEL JOACHIM;HAUSMANN MICHAEL 发明人 SCHNABEL JOACHIM;HAUSMANN MICHAEL
分类号 G11C11/406;(IPC1-7):G11C7/00 主分类号 G11C11/406
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