MULTIPLE MASTER, MULTIPLE SLAVE MATRIX BUS DEVICE, AND METHOD IMPLEMENTED IN SUCH A DEVICE

摘要

The invention concerns a matrix bus device between a plurality of master modules and slave modules. Said device comprises a plurality of arbitration modules distributed in the matrix, at the intersection between each master module and each slave module. The bus can be of the System on Chip type (SoC). Advantageously, within said bit map architecture, the arbiters and controllers are distributed. Said bus enables parallel communications, in point-to-point mode as well as transmissions in broadcast mode (one master and several slaves).