发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide the technology to particularly manufacture, with good reproducibility, TFT having excellent hot carrier resistance by giving a degree of freedom in design to the size of the TFT of the gate overlap LDD structure formed on the self-alignment basis. SOLUTION: A gate electrode is formed of a laminated body including a plurality of conductive layers. Widths of a first conductive layer and a second conductive layer in the direction of channel length are set to provide the result that the first conductive layer as the lower layer is longer than the other and the gate electrode is used as the mask for ion-doping to form the LDD. In this case, the optimum shape can be obtained by processing the shape of the mask pattern to form the gate electrode and then combining this process with the dry etching process, in order to set the LDD overlapped with the gate electrode, namely, Lov to 1μm or more, preferably to 1.5μm or more. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004039746(A) 申请公布日期 2004.02.05
申请号 JP20020192384 申请日期 2002.07.01
申请人 SEMICONDUCTOR ENERGY LAB CO LTD 发明人 MONOE SHIGEHARU
分类号 H01L21/3065;H01L21/336;H01L21/768;H01L29/41;H01L29/423;H01L29/49;H01L29/786;(IPC1-7):H01L21/336;H01L21/306 主分类号 H01L21/3065
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