| 摘要 |
PROBLEM TO BE SOLVED: To simplify the configuration of an aligning circuit provided in the pre-stage of a cache memory. SOLUTION: An arithmetic part 11 performs an arithmetic operation according to an instruction, and outputs data obtained as the result of the arithmetic operation. Data outputted from the arithmetic part 11 are stored in a store buffer 13. The data read from the store buffer 13 are stored in a cache memory 16. The aligning circuit 12 is made to rearrange the data outputted from the arithmetic part 11, and stored in the store buffer 13, and the aligning circuit 15 is made to rearrange the data read from the store buffer 13, and stored in the cache memory 16. Thus, it is possible to reduce a workload for rearranging the data in the align circuit 15. COPYRIGHT: (C)2004,JPO |
