| 摘要 |
<P>PROBLEM TO BE SOLVED: To increase a current flowing to a main circuit element of an inverter circuit, to suppress the generation of a surge voltage by reducing inductance in the main circuit element, and also to reduce the loss of the element by reducing the withstand voltage of the main circuit element. <P>SOLUTION: A plurality of FETs on an upper arm side and a lower arm side are arranged on a printed board PB. The figure shows by an arrow that a current flows to an output terminal OUT from a power supply terminal P via each FET and heat sinks A to D when the upper arm FET on the printed board PB is turned on. The heat sinks A to D are not shown in the figure. In heat sinks where the current flows to the FETs as shown in the figure, since either of FETs at right and left sides as shown in the figure has the same path length as the other FET has, both paths are made to have the same resistances, thereby reducing the imbalance of the current flowing to each FET. The heat sinks where the current flows to the FETs are shown in a shaded portion in the figure. <P>COPYRIGHT: (C)2004,JPO |
