发明名称 Wafer-level method for fine-pitch, high aspect ratio chip interconnect
摘要 A metal structure 300 for an integrated circuit having a plurality of contact pads and a patterned metallization 301 protected by an overcoat layer 303,306. The structure comprises a plurality of windows in the overcoat, selectively exposing the chip metallization, wherein the windows are spaced apart by less than 150 µm center to center. A metal column 308 is positioned on each of the windows; the preferred metal is copper; the column has a height-to-width aspect ratio larger than 1.25 and an upper surface wettable by re-flowable metal. The preferred column height-to-width aspect ratio is between 2.0 and 4.0, operable to absorb thermomechanical stress. A cap of a re-flowable metal 309 is positioned on each of the columns. The metal structure is used for attaching the IC chip to an external part 311.
申请公布号 EP1387402(A2) 申请公布日期 2004.02.04
申请号 EP20030102098 申请日期 2003.07.10
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 ARBUTHNOT, DIANE;EMMETT, JEFF R.;AMADOR, GONZALO
分类号 H01L23/485;H01L23/52;H01L21/3205;H01L21/60 主分类号 H01L23/485
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