发明名称 Inter-processor control
摘要 A system includes a first processor coupled to a second processor. The first and second processors are coupled to memory. The first processor fetches and executes supported instructions until an unsupported instruction is detected. The second processor executes the unsupported instruction. If there are less than a threshold number of consecutive supported instructions before the next unsupported instruction, the second processor loads the instructions in the first processor for execution so that the first processor does not fetch the instructions. If there are more than a threshold number of consecutive supported instructions before the next unsupported instruction, the first processor fetches and executes those instructions.
申请公布号 EP1387259(A2) 申请公布日期 2004.02.04
申请号 EP20030291924 申请日期 2003.07.30
申请人 TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS FRANCE 发明人 CHAUVEL, GERARD;LASSERRE, SERGE
分类号 G06F7/38;G06F9/30;G06F9/318;G06F9/32;G06F12/02;G06F12/08;G06F12/12 主分类号 G06F7/38
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