发明名称 Method for protecting an electronic circuit against fault-based attacks
摘要 <p>The method involves performing an additional calculation by a verification function on an intermediate result to obtain a calculation signature. A part of the calculation is performed to recalculate the signature and compare them to detect a possible error. An elementary operation using another super-function operation is performed from a larger set. Independent claims are also included for the following: (a) an electronic assembly comprising storage unit of a calculation process (b) a computer program including program code instructions to execute the steps of securing an electronic assembly (c) a smart card comprising a storage unit of a calculation process.</p>
申请公布号 EP1387519(A2) 申请公布日期 2004.02.04
申请号 EP20020291728 申请日期 2002.07.09
申请人 CP8 发明人 AKKAR, MEHDI-LAURENT;GOUBIN, LOUIS
分类号 G06F1/00;G06F7/38;G06F21/52;H04L9/06;H04L9/10;(IPC1-7):H04L9/06 主分类号 G06F1/00
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