| 摘要 |
The data processing system (40) has a central unit (41), a data processing unit (42), memory (51) for a Configurateur program and a memory for configuration and wiring (53). Integrated circuits under development are modelled by reading the architecture description (FDARCH), memorising component data in a table (TCINST), connecting interface signals and generating source files HDL(MGHDL) and HLL(MGHLL) : An independent claim is also included for a system for the automatic establishment of a global model for integrated circuits under development which uses a data processing equipment with a program called Configurateur. |
