| 摘要 |
To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) are deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefor, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit. |
