| 摘要 |
A differential amplifier circuit receives full range differential input signals, and produces a full range output signal, using CMOS transistors designed for one-half such operating voltage. The positive and negative input signals differentially drive first and second CMOS transistors. The source terminals of such first and second CMOS transistors are coupled to a current steering circuit by a pair of lower protection transistors; the gate terminals of such lower protection transistors are driven by level-shifted counterparts of the positive and negative input signals. The drain terminals of the first and second CMOS transistors are coupled to a common node via a pair of upper protection transistors, the gate terminals of which are also driven by the level-shifted counterparts of the input signals. The common node is coupled to a source of a reference current by an additional protection transistor; the gate terminal of the additional protection transistor is biased at a shield voltage set at the midpoint of the full operating voltage range.
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