发明名称 Memory device having selectable clock input and method for operating same
摘要 The present invention provides a memory device having a mode register with a selectable bit which sets the memory device to operate with a selected one of a plurality of possible clock input signals, for example, a single clock input or differential clock input.
申请公布号 US6687184(B2) 申请公布日期 2004.02.03
申请号 US20010939653 申请日期 2001.08.28
申请人 发明人
分类号 G11C7/10;G11C8/18;(IPC1-7):G11C8/00 主分类号 G11C7/10
代理机构 代理人
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