发明名称 |
High resolution, high speed, low power switched capacitor analog to digital converter |
摘要 |
An analog to digital converter includes first and second converter segments having respective first and second arrays of binary weighted capacitors. Each capacitor of the first segment has a first electrode connected to a first common node and a second electrode connected through respective switches to one of a first reference voltage terminal and an input terminal. Each capacitor of the second segment has a first electrode connected to a second common node and a second electrode connected through respective switches to one of the first reference voltage terminal and the input terminal. The converter includes a coupling capacitor connected between the first and second common nodes and capacitance means connected between the first common node and a reference voltage terminal. The coupling capacitor and capacitance means have capacitances, Cs and CATT respectively, that substantially satisfy the relationship: (2<p>-1).Cs-CATT=2<p>.C, where p is the number of bits coded in the first converter segment and C is the unit capacitance.
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申请公布号 |
US6686865(B2) |
申请公布日期 |
2004.02.03 |
申请号 |
US20030455894 |
申请日期 |
2003.06.06 |
申请人 |
STMICROELETRONICS S.R.L. |
发明人 |
CONFALONIERI PIERANGELO;ZAMPROGNO MARCO;NAGARI ANGELO |
分类号 |
H03M1/46;H03M1/68;H03M1/80;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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