发明名称 Apparatus and method for duty cycle conversion
摘要 A reference signal generator for generating an output reference signal having a target duty cycle. The reference signal generator comprises a sawtooth generator for receiving an input reference signal having a reference frequency and generating a sawtooth waveform having the reference frequency. Comparison circuitry compares the sawtooth waveform to a reference voltage and generates the output reference signal. The output reference signal is Logic 1 when the sawtooth waveform is greater than the reference voltage and is Logic 0 when the sawtooth waveform is less than the reference voltage. Feedback circuitry determines a duty cycle of the output reference signal by comparing a first time period when the output reference signal is Logic 1 to a second time period when the output reference signal is Logic 0. The feedback circuitry adjusts a value of the reference voltage to cause the output reference signal to achieve the target duty cycle.
申请公布号 US6686862(B1) 申请公布日期 2004.02.03
申请号 US20030371627 申请日期 2003.02.21
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 TAGARE MADHAVI V.
分类号 H03K5/156;H03M1/12;(IPC1-7):H03M1/12 主分类号 H03K5/156
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