SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PURPOSE: To effectively control gate-leak currents and GIDL currents while effectively controlling the off-leak currents of a plurality of memory cells in a semiconductor memory device. CONSTITUTION: The precharge potential of a non-selection bit line among a plurality of bit lines 5 is set by an HPR voltage source 2 to be lower than a power source voltage Vcc(a low voltage of 0.5V to 1.2V, for example, 0.8V) which determines the electric potential on the high side of the data stored in the memory cell. The electric potential of a non-selection word line among a plurality of word lines 4 is set by a NWL voltage source 1 to be a prescribed potential(for example, -1/4Vcc=-0.2V). The total sum of the absolute values of the precharge potential(0.4V) of the non-selection bit line and minus potential(-0.2V) of the non-selection word line is set to be less than the power voltage Vcc(0.8V).