| 摘要 |
PURPOSE: A delay locked loop is provided to reduce the jitter by forming an unit relay for maintaining constantly the delay time regardless of a variation of supply voltage or a variation of ground voltage. CONSTITUTION: A delay locked loop includes a delay line for outputting a delayed internal clock, a phase detector for detecting a phase difference between the internal clock and an external clock, and a delay controller for controlling the delay time of the delay line according to the phase difference. The unit relay includes a logical combination unit and a plurality of delay blocks(232-235) having constant delay values. Each delay block(232-235) has a resistor, the first switch, the second switch, and a capacitor connected to the second switch and a ground voltage supply unit.
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