| 摘要 |
PURPOSE: A circuit of a flat panel display for efficiently checking display data bits is provided to reduce an area of a check circuit by efficiently checking display data bits, and reduce power consumption by preventing unnecessary actions of the check circuit. CONSTITUTION: A test signal generator(100) generates odd test signals and even test signals to an odd test line(310) and an even test line(300). A check element(200) checks the odd test signals and the even test signals. NMOS(N-channel Metal Oxide Semiconductor) transistors(210,212) of even data bit check elements are driven by a test enable signal. If even data bits are at the same level as the even test signals applied to the even test line, a current path is not formed to prevent a large quantity of a current from flowing. Otherwise, a DC(Direct Current) path is formed to flow a large quantity of a current. NMOS transistors(221,223) of odd data bit check elements are driven by the test enable signal. If odd data bits are at the same level as the odd test signals applied to the odd test line, a current path is not formed to prevent a large quantity of a current from flowing. Otherwise, a DC(Direct Current) path is formed to flow a large quantity of a current. |
