| 摘要 |
PURPOSE: A method for fabricating a via hole and a trench by a dual damascene process is provided to form the profile of a trench by preventing the third hard mask from being damaged in an etch process for forming the second interlayer dielectric and trenches of the first and second hard masks wherein the third hard mask is used as a pattern and the etch selectivity is excellent. CONSTITUTION: The first etch barrier layer(34), the first interlayer dielectric(36), the second etch barrier layer(38), the second interlayer dielectric(40), the first hard mask(42), the second hard mask(44), the third hard mask(46) and the first mask pattern are formed on a semiconductor substrate(30) having a metal interconnection(32). The third hard mask is etched with the first mask pattern. Photoresist is formed in the third hard mask and is etched to form the second mask pattern. The second interlayer dielectric, the second hard mask and the third hard mask are etched through the second mask pattern. The first interlayer dielectric and the second etch barrier layer are etched to form a via hole in such a way that the second interlayer dielectric, the third hard mask and the second hard mask which are etched are used as a pattern. The photoresist formed in the second mask pattern is eliminated. The second interlayer dielectric, the first hard mask and the second hard mask are etched to form a trench by using the remaining third hard mask as a pattern.
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