发明名称 METHOD FOR FORMING TRENCH TYPE ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a trench type isolation layer of a semiconductor device is provided to restrain moat at edge portions of trench by depositing a liner nitride layer using PECVD(Plasma Enhanced CVD). CONSTITUTION: A trench mask pattern including a pad oxide and nitride layer(21,22) is formed on a silicon substrate(20). A trench is then formed. A sidewall oxide layer(23) is formed at inner walls of the trench by thermal oxidation processing. By selectively etching the sidewall oxide layer, an under-cut region is formed at the edge portion of the pad nitride layer(22). A liner nitride layer(24) is deposited by PECVD without depositing at the under-cut region. Then, an isolation layer is formed by filling an insulating layer in the trench and planarizing.
申请公布号 KR20040008669(A) 申请公布日期 2004.01.31
申请号 KR20020042339 申请日期 2002.07.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHA, YEONG GUK
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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