发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To solve the problem that an erroneous writing occurs when the threshold voltage of a memory cell becomes equal to or less than a prescribed voltage after an erasing. <P>SOLUTION: A first sense latch circuit S/L1 is connected to bit lines BLE and BLO through transistors QNH3 and QNL1 and a second sense latch circuit S/L2 is connected to the lines through transistors QNH4 and QNL2. After erasing the data in a memory cell, data are read for excessive erasing detection and the read data are latched to the circuit S/L1. The presence and/or the absence of an excessively erased cell is detected from the latched data. When an excessively erased cell exists, a soft writing is conducted so that the threshold voltage is converged into a prescribed range. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004030897(A) 申请公布日期 2004.01.29
申请号 JP20030178556 申请日期 2003.06.23
申请人 TOSHIBA CORP 发明人 TAKEUCHI TAKESHI;TANAKA TOMOHARU
分类号 G11C16/02;G11C16/06;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/02
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