| 发明名称 |
METHOD FOR CORRECTING DESIGN PATTERN FOR FORMING GATE ELECTRODE AND SEMICONDUCTOR DEVICE FORMED BY USING THE SAME METHOD AND METHOD FOR MANUFACTURING THE SAME DEVICE |
| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress the fluctuation of semiconductor characteristics when side wall width is changed according to the pattern compression of a gate electrode. <P>SOLUTION: The design pattern of a gate electrode is corrected based on the shape of a side wall changing according to a distance between the patterns of a plurality of gate electrodes in order to correct semiconductor characteristics such as a threshold voltage. <P>COPYRIGHT: (C)2004,JPO |
| 申请公布号 |
JP2004031909(A) |
申请公布日期 |
2004.01.29 |
| 申请号 |
JP20030056058 |
申请日期 |
2003.03.03 |
| 申请人 |
SONY CORP |
发明人 |
TSUKAMOTO MASANORI |
| 分类号 |
H01L21/8234;H01L21/8242;H01L27/088;H01L27/108 |
主分类号 |
H01L21/8234 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
