| 发明名称 |
ACTIVE RESTORE WEAK WRITE TEST MODE |
| 摘要 |
A semiconductor memory device having an active restore weak write test mode for resistive bitline contacts. During the write margin test a circuit is used to block the bitline restore devices from turning off during the SRAM write cycle.
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| 申请公布号 |
US2004017709(A1) |
申请公布日期 |
2004.01.29 |
| 申请号 |
US20020064568 |
申请日期 |
2002.07.26 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BRACERAS GEROGE M. |
| 分类号 |
G11C29/02;(IPC1-7):G11C7/00 |
主分类号 |
G11C29/02 |
| 代理机构 |
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