| 摘要 |
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. Correcting minimum spacing rule violations between wide class objects of non-design geometries is accomplished by deducting an enlarged wide class object of a first non-design geometry from a second non-design geometry; wherein the enlarged wide class object of the first non-design geometry is formed by enlarging a wide class object of the first non-design geometry at one or more non-virtual edges of the wide class object of the first non-design geometry but not at one or more virtual edges of the wide class object of the first non-design geometry wherein the wide class object of the first non-design geometry has at least one virtual edge.
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