发明名称 Method for integrating low-K materials in semiconductor fabrication
摘要 A method for integrating low-K materials in semiconductor fabrication. The process begins by providing a semiconductor structure having a dielectric layer thereover, wherein the dielectric layer comprising an organic low-K material. The dielectric layer is patterned to form pillar openings. A pillar layer is deposited over the semiconductor structure; thereby filling the pillar openings with the pillar layer. The pillar layer is planarized to form pillars embedded in said dielectric layer. The pillar layer comprises a material having good thermal stability, good structural strength, and good bondability of spin coating back-end materials, improving the manufacturability of organic, low-K dielectrics in semiconductor fabrication. In one embodiment, the pillars are formed prior to forming dual damascene interlayer contacts. In another embodiment, pillars are formed simultaneously with interlayer contacts.
申请公布号 US2004017009(A1) 申请公布日期 2004.01.29
申请号 US20030623910 申请日期 2003.07.18
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 SHUE SHAU-LIN;TSAI MING-HSING
分类号 H01L21/768;(IPC1-7):H01L23/48;H01L23/52;H01L29/40;H01L21/476 主分类号 H01L21/768
代理机构 代理人
主权项
地址