| 摘要 |
A dielectric layer is etched to form an opening in dielectric layer. A gate oxide layer is formed on semiconductor substrate in said opening. A barrier conductor is formed along the surface of the opening. A metal layer is formed on the barrier conductor and refilled into the opening. A portion of the metal layer and the barrier conductor is removed to form a gate for said transistor. The dielectric layer is removed. The barrier conductor is removed on sidewall of the gate. Lightly doped drain region is formed in the semiconductor substrate. Next, Sidewall spacer is formed on sidewall of the gate. Then, source and drain is formed in the semiconductor substrate by ion implantation using the gate and spacer as masking.
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