发明名称 Architecture for controlling dissipated power in a system-on-chip and related system
摘要 A system-on-chip (SoC) architecture includes a plurality of blocks, each including a power control module to selectively control the power dissipated by the bloc. For each block, a power register is provided to receive power control instructions to selectively control the respective power control module. The system also includes a power control unit for writing respective power control instructions into the power control registers of the blocks, whereby the power dissipated is controlled individually and independently for each block under the centralized control of the power control unit. For each block, a power status register is also provided to receive status information concerning power control within the respective block. The power control unit reads the status instructions from such power status registers.
申请公布号 US2004019814(A1) 申请公布日期 2004.01.29
申请号 US20030440044 申请日期 2003.05.16
申请人 STMICROELECTRONICS SA;STMICROELECTRONICS S.R.I. 发明人 PAPPALARDO FRANCESCO;MANTELLASSI LUIGI
分类号 G06F1/32;H01L23/34;(IPC1-7):G06F1/26 主分类号 G06F1/32
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