发明名称 INTEGRATED CIRCUIT ARRANGEMENT
摘要 The invention relates to an integrated circuit arrangement (150) comprising a monolithic serial inductance (125, 126). The integrated circuit arrangement (150) has an output circuit comprising at least one first output terminal (104, 108), at which a data signal can be provided and at least one first data output terminal (152, 154). At least one first serial inductance (125, 126) is connected between the output terminal(s) (104, 108) and the data output terminal(s) (152, 154).
申请公布号 WO2004010501(A1) 申请公布日期 2004.01.29
申请号 WO2003DE02349 申请日期 2003.07.11
申请人 INFINEON TECHNOLOGIES AG;KEHRER, DANIEL;KNAPP, HERBERT 发明人 KEHRER, DANIEL;KNAPP, HERBERT
分类号 H01L23/66;H03F3/45;H03H7/01;H03H11/02 主分类号 H01L23/66
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