| 摘要 |
PROBLEM TO BE SOLVED: To provide the layout method of a semiconductor integrated circuit device capable of efficiently executing automatic wiring using a layout tool when the circuit scale of the random gate area of a semiconductor integrated circuit device is large. SOLUTION: This layout method of a semiconductor integrated circuit is provided with a step for extracting modules whose circuit patterns are the same from modules which are scheduled to be arranged in a random gate area, a step for integrating the extracted modules into macro modules, and for preliminarily arranging those modules in the random gate area, and a step for automatically arranging the modules which are scheduled to be arranged in the random gate area other than the extracted modules in the random gate area by using a predetermined layout tool. COPYRIGHT: (C)2004,JPO
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