| 摘要 |
A high speed debug support interface has circuits to interface on-chip debug support circuits to a high bandwidth communications port means located on the surface of a system integrated circuit ( 101 ) and to on-chip debug support circuits ( 100 ). The communication port means can be realised by bonding or integrating special sender and or receiver cells preferably optical sender cells ( 103 ) and or optical receiver cells ( 110 ) onto the surface of the system integrated circuit ( 101 ). The high speed debug support interface communicates with on-chip or in-assembly debug support circuits and an external development tool ( 108 ) to permit hardware and software related debugging and development activities, including program tracing, data tracing and memory substitution. The high speed debug support interface has circuits to interface on-chip debug support circuits to system resources such as memory located within the device assembly ( 102 ) and connected by the system interconnect. |
