| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to be capable of reducing the resistance of a PMOS(P channel Metal Oxide Semiconductor) silicide layer, improving thermal stability of the silicide layer, and preventing the increase of junction leakage current. CONSTITUTION: After a gate and a gate spacer(5) are sequentially formed at the upper portion of a semiconductor substrate(1), a source/drain region(6) are formed at both sides of the gate in the semiconductor substrate. After an SOG(Spin On Glass) layer is formed on the resultant structure, the upper surface of the gate is exposed to the outside by carrying out an etch-back process at the SOG layer using etching gas having a predetermined etching rate for the gate and gate spacer. After the first Co/TiN layer is formed on the resultant structure, the first silicide layer(9) is formed at the upper portion of the gate by carrying out an annealing process. After the second Co/TiN layer is formed on the resultant structure, the second silicide layer(11) is formed at the upper portion of the source/drain region by carrying out an annealing process.
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