| 摘要 |
PURPOSE: A method for forming a copper line of a semiconductor device is provided to be capable of preventing the generation of a rounding effect at the upper edge portion of a damascene pattern, for improving the reliability of the device and increasing the degree of integration of the device. CONSTITUTION: A via hole etch stop layer(12), a via hole insulating layer(13), a trench etch stop layer(14), a trench insulating layer(15), and a capping insulating layer(16) are sequentially formed at the upper portion of a substrate(10), wherein the substrate includes a lower copper line(11). After a photoresist pattern is formed at the upper portion of the capping insulating layer, a dual damascene pattern(18) is formed by carrying out an etching process at the resultant structure using the photoresist pattern as an etching mask. Then, the lower copper line is exposed to the outside by selectively etching the via hole etch stop layer. After the photoresist pattern is polished, a post cleaning process is carried out at the resultant structure for completely removing the photoresist residues.
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