发明名称 SYNCHRONIZATION CAPTURING APPARATUS AND SYNCHRONIZATION CAPTURING METHOD
摘要 A first-stage processing section 105 detects a plurality of slot timings corresponding to a plurality of correlation values equal to or greater than a threshold value, a second-stage processing section 110 detects scrambling code timing and a scrambling code group in accordance with one of the slot timings, a third-stage processing section 115 identifies a scrambling code in accordance with the scrambling code timing, and a controller 104 switches a switch 103 so that processing by the second-stage processing section 110 and processing by the third-stage processing section 115 are executed for a plurality of slot timings each time processing by the first-stage processing section 105 is executed once. <IMAGE>
申请公布号 EP1202484(A4) 申请公布日期 2004.01.28
申请号 EP20010938636 申请日期 2001.06.13
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 AIHARA, KOICHI;SOMON, JUNJI;IMAIZUMI, SATOSHI;MINAMIDA, NORIAKI;SUZUKI, HIDETOSHI
分类号 H04B1/707;H04B1/7083;H04B7/26;H04L7/00;H04W48/16 主分类号 H04B1/707
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