| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to reduce a surface resistance and a contact resistance by compensating an etched salicide layer in a contact etch process. CONSTITUTION: A gate and a gate spacer(5) are formed on a semiconductor substrate(1) including an STI(Shallow Trench Isolation) layer. A source/drain region(6) is formed thereon. A salicide layer is formed on the gate and the source/drain region(6). A PMD(Pre-Metal Dielectric) is deposited thereon. A planarized PMD layer(9) is formed by performing a CMP process. The PMD layer(9) is etched. A TiCl4 Ti/TiN layer(10) is formed by using a PECVD method. A tungsten layer is formed by depositing tungsten on the resultant structure. A tungsten plug layer(11) is formed by removing the TiCl4 Ti/TiN layer(10). The first metal material is deposited thereon. The first metal pattern is formed by etching the first metal material.
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